Sugon scaleX40-3G: 40 Accelerators and 5.62 TB of HBM in 16U

Written and maintained by Haink's infrastructure team · Compiled from Sugon's product page, product brochure, 45-page solution manual and 207-page user manual, plus accelerator specifications supplied by Sugon on request. NVIDIA and AMD figures re-verified against vendor documentation, 17 September 2026

The scaleX40-3G (曙光 scaleX40-3G) is Sugon's enterprise superpod, announced 26 March 2026. It places 40 Hygon DeepComputing 3 accelerators and 5.62 TB of HBM in 16U of a standard 19-inch rack, on a single-tier interconnect providing 448 GB/s between any two cards with unified memory addressing across all forty.

At the time of writing there is no English-language specification for this product anywhere. This page is compiled from Sugon's own documentation and from accelerator specifications the company supplied to us on request. Every figure below is labelled by where it came from: published by Sugon, supplied by Sugon, derived with the arithmetic shown, or absent — and where it is absent we say so rather than estimating.

Specifications at a glance

Node composition

A pod comprises fifteen field-replaceable units in three roles. Compute and switch nodes mate orthogonally — they plug directly into one another with no cables between them.

The PCIe 5.0 slots in each compute node are the scale-out path — this is where scaleFabric or another cluster network attaches. HSL handles traffic inside the pod; anything leaving it goes out through PCIe.

The accelerator: DeepComputing 3

The DCU (Deep Computing Unit) is Hygon's GPGPU accelerator line, and DeepComputing 3 — 深算三号 — is the third generation. The lineage traces to the same 2016 AMD licensing relationship that produced Hygon's x86 processors: the architecture is AMD CDNA-derived and the software stack, DTK (Deep Toolkit), descends from AMD's ROCm rather than being written from scratch.

Sugon does not name the part. We searched the full text of the product page, the brochure, the 45-page solution manual and the 207-page user manual: the accelerator is called only 深算三号 GPU, and no part number appears anywhere. Hygon ships at least two third-generation cards — one with 64 GB and no FP8 support, one with 144 GB that does run FP8 — and only the second is consistent with what Sugon publishes here. Our page on the DCU line sorts the part numbers out.

What one accelerator does

Sugon's public documentation gives only the pod-level aggregate. The per-accelerator figures below were supplied by Sugon on request, and they close the largest gap in the public record — most of all the memory bandwidth, which is what actually bounds token generation.

DeepComputing 3 figures supplied by Sugon. H200 and MI300X figures are dense, from the vendor datasheets — NVIDIA quotes 1,979 TFLOPS FP16 and 3,958 FP8 with sparsity, halved here — and both vendors publish two FP64 rates, one on the vector units and one through the matrix or tensor cores. B300 figures are dense and derived from NVIDIA's own system specifications, because NVIDIA does not publish a per-GPU table for it: the DGX B300 is quoted at 72 PFLOPS FP8 with sparsity across eight GPUs, which is 36 PFLOPS dense and 4.5 per GPU; FP16 follows at half of FP8; FP64 comes from the GB300 NVL72's 100 TFLOPS across 72 GPUs. Note that the liquid-cooled GB300 NVL72 clocks higher than the air-cooled DGX B300 — 5 PFLOPS dense FP8 per GPU against 4.5 — and this table uses the DGX figure, since a DGX is the box a scaleX40 is weighed against. Link bandwidths are bidirectional; MI300X uses a different link topology and its figure is not comparable on this row.

Are these dense figures?

Sugon does not label them, and the distinction is the single most common way accelerator comparisons go wrong: NVIDIA quotes two numbers for every precision, one measured with structured sparsity applied, and setting a vendor's dense figure against NVIDIA's sparse one doubles the apparent gap for free. The same scepticism has to run in both directions. Three checks say these are dense figures.

• They reconcile with the published aggregate exactly. 708 × 40 = 28,320 TFLOPS = 28.32 PFLOPS, against the "≥ 28 PFLOPS FP8" Sugon publishes for the pod. Card figure and pod figure sit on one basis, whichever it is.
• The ladder has the right shape. FP8 is exactly twice FP16 — the ordinary consequence of halving precision. FP16 is 16.09 times FP64. On AMD's MI300X, the CDNA 3 part this architecture descends from, dense FP16 is 16.0 times vector FP64. A ladder built from a sparse FP16 number over a vector FP64 number would land near 8, not near 16.
• Sparsity is not normally quoted for FP64. The 22 TFLOPS has no sparse twin to be confused with, and it anchors everything above it.

That is an inference from internal consistency, not a statement by the vendor, and we mark it as one. It is worth a line in writing before a purchase order — see below.

The design read

DeepComputing 3 carries more memory than an H200 — 144 GB against 141 — with 2.80 times less FP8 and FP16 throughput and exactly half the memory bandwidth. Divide the one by the other and the character of the part appears: 6.78 GB/s of memory bandwidth for every TFLOPS of FP16, against 4.85 on an H200 and 3.56 on a B300. Per unit of arithmetic it carries 1.40 times the bandwidth of an H200 and 1.91 times that of a B300. It is a memory-forward part, and the system built around it is a memory-forward system. Whether that is the right machine depends entirely on whether the workload is bounded by memory or by arithmetic.

One number stands apart from the rest. At 22 TFLOPS of FP64 the accelerator sits behind an H200 but 15.8 times ahead of a B300, which carries 1.39 TFLOPS after a 96.5% cut from the B200's 40. Compared as whole chassis rather than as cards: 880 TFLOPS of FP64 in one scaleX40 against 11.1 in an eight-GPU DGX B300. In double precision the current NVIDIA generation has largely left the field.

Against the H200 the answer depends on a question nobody has asked Sugon. NVIDIA publishes two FP64 rates for the H200 — 34 TFLOPS on the vector units and 67 through the tensor cores — and a well-written double-precision kernel reaches the second. Sugon does not say which kind its 22 TFLOPS is. Against the vector rate the card is 1.55 times behind and a scaleX40 delivers 3.24 times a DGX H200; against the tensor rate the card is 3.05 times behind and the pod delivers 1.64 times. Both are wins at chassis level, but they are different arguments, and the difference is a single line of clarification from the vendor. Against Blackwell the ambiguity disappears: NVIDIA quotes one merged "FP64 / FP64 Tensor Core" row for both GB200 and GB300, so there is no second number there.

HSL, and why "ten times InfiniBand NDR" needs unpacking

Sugon's literature describes HSL as delivering "ten times the bandwidth of an IB NDR network, with latency down to hundreds of nanoseconds." The arithmetic checks out: InfiniBand NDR runs at 400 Gb/s, which is 50 GB/s, and ten times that is 500 GB/s — consistent with the published 448 GB/s peer-to-peer figure.

But the comparison is drawn against the wrong layer, and this trips up almost everyone reading the specification for the first time. NVIDIA operates two networks that do different jobs:

HSL performs NVLink's job, but Sugon benchmarks it against InfiniBand — NVIDIA's slower network, by a factor of eighteen to thirty-six. Compared like with like, HSL sits below NVLink on both current NVIDIA generations.

The comparison Sugon is actually making becomes fair above eight accelerators, and that is the point worth understanding. An NVIDIA DGX holds eight GPUs on NVLink. Reaching forty means five DGX chassis, and traffic between them drops onto InfiniBand at roughly 50 GB/s per card. In a job spanning forty accelerators, most peer traffic crosses a chassis boundary. The scaleX40 keeps all forty on 448 GB/s uniformly.

So the honest reading is a crossover, not a verdict:

• Up to 8 accelerators: NVIDIA is faster — 900 or 1,800 GB/s against 448.
• From 9 to 40: the scaleX40 is faster, by close to an order of magnitude, because the NVIDIA alternative has fallen back to the network.
• Above 40: undetermined. Traffic leaves the pod through PCIe onto scaleFabric or another cluster network, and Sugon does not publish what the resulting profile looks like.

Separately, NVIDIA's NVL72 rack keeps 72 GPUs on 1,800 GB/s NVLink and beats HSL in every regime — at rack scale and around 140 kW.

What Sugon says it is for

Worth quoting, because vendors rarely narrow their own claims: the product brochure states the scaleX40-3G "can cover inference, fine-tuning and most artificial intelligence application scenarios." Inference and fine-tuning — not training from scratch.

The design agrees with the scoping. Large pooled memory, moderate arithmetic, KV-cache offload into ParaStor storage, DeepEP support for mixture-of-experts communication, 800+ models pre-adapted on the SothisAI platform. This is a machine built to serve models, not to train them from nothing.

Sugon's solution manual does also market into scientific computing — cryo-EM three-dimensional reconstruction, meteorological forecasting, genomics — and states that reconstruction workloads carry a "rigid requirement" for double-precision arithmetic. That claim now has a number behind it: 22 TFLOPS of FP64 per accelerator, 880 TFLOPS across the pod — against 272 TFLOPS in an eight-GPU DGX H200 on the vector rate, 536 through its tensor cores, and 11.1 in a DGX B300. For a double-precision code, this is the strongest argument the machine has.

How it compares

Set against the two NVIDIA systems a buyer would realistically weigh it against — whole chassis against whole chassis, because a chassis is what occupies rack units, draws power and carries a price. Sugon figures are published or supplied by Sugon; H200 figures are dense, from NVIDIA's datasheet; B300 figures are dense, taken from NVIDIA's DGX B300 specification, which quotes 72 PFLOPS of FP8 with sparsity and states that dense is half of it.

Memory is given as the plain sum of per-card capacity in every column, so the three are comparable. Sugon markets its column as "5.62 TB", which is the same 5,760 divided by 1,024.

The shape of it: more pooled memory than either NVIDIA system — 5.1 times a DGX H200 and 2.5 times a DGX B300 — more aggregate memory bandwidth than either, FP8 between the two, and three to four times the power draw. Normalise per kilowatt and the picture inverts everywhere except memory: against a DGX H200 a scaleX40 delivers 1.16 times the pooled memory per kilowatt, but 0.57 times the bandwidth and 0.41 times the FP8. A memory-bound workload that will not fit in 2,304 GB is the case where this machine has an argument no NVIDIA box in the same footprint can answer. A compute-bound training run is not.

What is still missing, and what to get in writing

We reviewed the product page, the product brochure, the 45-page solution manual and the 207-page user manual. Three numbers appeared in none of them: HBM bandwidth per accelerator, FP64 throughput, and accelerator TDP. Sugon has since supplied the first two on request, and they are in the tables above. That is worth noting on its own — the figures exist, and the company releases them to a buyer who asks. What remains open is a shorter and more specific list.

The pattern of what Sugon publishes and what it holds back is consistent across every channel, which makes it a disclosure policy rather than an oversight — and a policy is something a buyer can push against, as the two figures now in the tables above demonstrate. Ask for the remaining three in writing before a purchase order, and ask for every number on a dense basis.

Deployment realities

Three constraints deserve checking before anything else, because they are physical rather than commercial.

Power. 45 kW typical and 50 kW peak into 16U. Many enterprise halls cannot deliver that to a single rack position regardless of what the budget allows. Sugon's air/liquid hybrid design and CDU option genuinely do make it deployable in an air-cooled room, which is unusual at this density — but the electrical supply still has to be there.

Floor loading. Approximately 500 kg over a footprint of 446 × 1020 mm is on the order of 1,100 kg/m². A large number of raised floors will not accept that without reinforcement, and it is not mentioned in Sugon's documentation.

Coolant. The main coolant inlet and outlet use 1.5-inch standard clamp fittings. Where a facility already has a liquid loop, confirm the fitting standard, supply temperature and flow rate against the pod's requirement rather than assuming compatibility.

Storage and software

The pod is designed to be paired with ParaStor, Sugon's distributed unified storage, quoted at 220 GB/s and 10 million IOPS per device. Two features are specifically relevant to accelerator workloads: XDS moves data directly between accelerator memory and NVMe storage, bypassing host CPU and system memory, with a reported 30–70% reduction in CPU utilisation and 2–3× the peak bandwidth of the conventional path; and KV cache offload extends a model's attention cache beyond HBM into DRAM, local SSD and ParaStor — the mechanism by which a system with finite accelerator memory serves long contexts.

Software is SothisAI, covering development, scheduling and operations, with Sugon stating that 800+ large models are pre-adapted and optimised. The accelerator toolchain is Hygon's DTK. Because DTK descends from AMD's ROCm, code that already runs on AMD Instinct ports comparatively cheaply, while hand-tuned CUDA does not.

Design details worth knowing

Two engineering choices are unusual enough to be worth calling out, because they affect operations rather than benchmarks.

Cableless orthogonal mating. Compute and switch nodes plug directly into each other with no cables in between. Sugon claims a tenfold availability improvement over cabled designs and 40–70% lower power than an optical interconnect, with assembly and maintenance falling from hours to minutes. Cables and optics are among the most common failure sources in dense accelerator systems, so removing them from the scale-up path is a real reliability argument rather than a marketing one.

Single-tier topology. All 40 accelerators sit on one switching layer rather than two. Fewer hops means lower latency and fewer components that can fail — at the cost of capping the pod at 40, which is why anything larger becomes a scale-out problem.

Frequently asked questions

How much memory does the Sugon scaleX40 have?

144 GB per accelerator across 40 accelerators — 5,760 GB in total, which Sugon markets as 5.62 TB by dividing by 1,024. Each card runs at 2.4 TB/s, so the pod carries 96 TB/s of aggregate HBM bandwidth. Compared on the same basis, that is 5.1 times the accelerator memory of an eight-GPU DGX H200 (1,128 GB) and 2.5 times a DGX B300 (2,304 GB).

What accelerator does the scaleX40 use?

The Hygon DeepComputing 3 (深算三号), four per compute node across ten compute nodes. Sugon publishes no part number for it in any of its documentation. The architecture is AMD CDNA-derived under the 2016 AMD–Hygon licensing arrangement, and it is programmed through DTK, Hygon's ROCm-derived toolkit.

What are the specifications of the Hygon DeepComputing 3 accelerator?

Supplied by Sugon on request: 144 GB of HBM at 2.4 TB/s, and 708 TFLOPS FP8, 354 TFLOPS FP16 and 22 TFLOPS FP64 per card, with 448 GB/s bidirectional to any other card in the pod and cache coherence across the pooled memory. Set against an NVIDIA H200 that is 1.02 times the memory capacity, half the memory bandwidth, and 2.80 times less FP8 and FP16 — but 15.8 times the FP64 of a B300. Sugon publishes neither a part number nor a TDP for it.

What is HSL and how fast is it?

HSL is Sugon's scale-up bus — the layer performing the role NVLink performs for NVIDIA. It provides 448 GB/s bidirectional between any two of the 40 accelerators on a single-tier CLOS topology, more than 17 TB/s aggregate, latency in the hundreds of nanoseconds, with Load/Store memory semantics and unified, cache-coherent memory addressing across the pod.

How much power does a scaleX40 draw?

Typical peak around 45 kW, maximum 50 kW, fed from a 2U 60 kW power shelf with twelve modules in 9+3 redundancy. It accepts 380 V three-phase AC, three 220 V single-phase feeds, or three 190–400 V DC feeds.

Can the scaleX40 be air cooled?

Partly. The design is a cold-plate liquid and air hybrid: high-power silicon is liquid cooled while the rest is air cooled, and with an air/liquid CDU the pod can be deployed in a conventional air-cooled machine room. That is unusual at 45 kW in 16U and is one of the more practically useful things about the product.

What is the FP64 performance of the scaleX40?

22 TFLOPS per accelerator — 880 TFLOPS across the 40-accelerator pod. Sugon publishes no FP64 figure in any of its own documents; the number was supplied to us on request. For context, an eight-GPU DGX H200 delivers 272 TFLOPS on the vector rate or 536 through its tensor cores, and a DGX B300 delivers 11.1, NVIDIA having cut FP64 by 96.5% between the B200 and the B300. Per card the Sugon part is 1.55 times behind an H200 on its vector rate, 3.05 times behind its tensor-core rate, and 15.8 times ahead of a B300, which is why the company markets the pod into cryo-EM and meteorological work.

Is the scaleX40 a training or an inference machine?

Sugon scopes it to inference and fine-tuning in its own product brochure, and the design supports that: large pooled memory, moderate arithmetic, KV-cache offload into storage, and mixture-of-experts communication support. For training large models from scratch, a DGX B300 offers 1.3 times the FP8 throughput in a third of the power.

Related

• Sugon — the company, the product lines and the Hygon relationship
• Hygon DCU and DeepComputing 3 — the accelerator, and how to tell the cards apart
• HSL, NVLink and InfiniBand — where the domain-size crossover sits
• scaleX40 vs DGX H200 vs DGX B300 · ParaStor · Sugon liquid cooling
• AI cluster architecture — how scale-up and scale-out layers fit together
• Liquid cooling for AI servers — what 45 kW in 16U requires
• GPU server buying guide · AI infrastructure cost guide
• Huawei enterprise IT · xFusion FusionServer

Sources

• Sugon — scaleX40 product page (40 cards, 28 PFLOPS FP8, 5.62 TB HBM, 448 GB/s peer-to-peer, node composition, power and physical specifications)
• Sugon — scaleX40 solution manual, 45 pp. (precision support list, aggregate FP8 and HBM figures, memory-bandwidth bottleneck statement, eight-card OAM server comparisons)
• Sugon — scaleX40-3G product brochure (node composition, system power and weight, HSL memory semantics, vendor scoping to inference and fine-tuning, orthogonal cableless design)
• Sugon — scaleX40 solution manual, 45 pp. (aggregate 17 TB/s, ParaStor and XDS, KV cache architecture, scientific computing scenarios)
• Sugon — scaleX40-3G server user manual, 207 pp. (system power, node specifications)
• Sugon — DeepComputing 3 accelerator specification, supplied on request, September 2026 (144 GB HBM, 2.4 TB/s, FP64 22 / FP16 354 / FP8 708 TFLOPS, 448 GB/s bidirectional accelerator-to-accelerator with cache coherence). Not present in any Sugon public document at the time of writing.
• Sugon — scaleX40 announcement, 26 March 2026
• NVIDIA — H200 (141 GB, 4.8 TB/s, FP64 34 / FP64 Tensor Core 67, FP16 and FP8 quoted with sparsity and halved here, NVLink 900 GB/s) · NVIDIA — DGX B300 and its user guide (8 × 288 GB = 2.3 TB, 72 PFLOPS FP8 with sparsity, 14.5 kW) · NVIDIA — GB300 NVL72 (FP64 100 TFLOPS across 72 GPUs) · NVIDIA — GB200 NVL72 (FP64 2,880 TFLOPS across 72, giving the B200's 40 per GPU) · NVIDIA — DGX H100/H200 user guide (1,128 GB, 10.2 kW) · AMD — Instinct MI300X
• Hygon DCU generations and the CDNA lineage